Design of back-illuminated voltage-domain global shutter pixels with dual in-pixel storage
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Global shutter pixels are indispensable for applications wherein the minimisation of motion artefacts is of critical importance. However, these pixels are more complex than the common rolling shutter type pixels and require some form of per-pixel storage. They are almost invariably reliant upon metal light shielding in order to protect their in-pixel memory nodes and this prevents them from taking advantage of some of the latest developments in CMOS image sensor technology. Backside-illumination is the most prominent example of such a technology. The greater sensitivity afforded by the reduced optical stack height is indispensable for many applications, particularly in the mobile market where form factor and power consumption are constrained. The design challenge is to exploit these advantages offered by backside-illumination without making use of metal shielding of the per-pixel memory. The research in this thesis covers the design, implementation and characterisation of a back-illuminated voltage-domain global shutter pixel. The pixel architecture is a novel 10 transistor-per-pixel architecture with dual independent in-pixel storage nodes. Beginning with the pixel architecture, the design is developed through TCAD-driven photodiode and pixel layout co-optimisation. The behaviour of pixels with differential parasitic light sensitivity (PLS) behaviour is analysed in greater detail than previously reported and a prediction model is developed based upon this. The 10T pixel is characterised and found to have excellent PLS of -73:5 dB native and -82:5 dB differential PLS at 940 nm. The dual in-pixel storage enables the pixel to operate either in a low noise correlated double sampling mode with differential PLS, or in an exposure-bracketed high dynamic range imaging (HDR) mode. This HDR mode is successfully demonstrated and yields substantial enhancement of the pixel dynamic range.
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