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dc.contributor.advisorO'Boyle, Michael
dc.contributor.advisorDubach, Christophe
dc.contributor.authorTomusk, Erik-Arne
dc.date.accessioned2017-06-22T14:16:38Z
dc.date.available2017-06-22T14:16:38Z
dc.date.issued2016-11-29
dc.identifier.urihttp://hdl.handle.net/1842/22076
dc.description.abstractHeterogeneous processors intended for mobile devices are composed of a number of different CPU cores that enable the processor to optimize performance under strict power limits that vary over time. Design space exploration techniques can be used to discover a candidate set of potential cores that could be implemented on a heterogeneous processor. However, candidate sets contain far more cores than can feasibly be implemented. Heterogeneous processor composition therefore requires solutions to the selection problem and the evaluation problem. Cores must be selected from the candidate set, and these cores must be shown to be quantitatively superior to alternative selections. The qualitative criterion for a selection of cores is diversity. A diverse set of heterogeneous cores allows a processor to execute tasks with varying dynamic behaviors at a range of power and performance levels that are appropriate for conditions during runtime. This thesis presents a detailed description of the selection and evaluation problems, and establishes a theoretical framework for reasoning about the runtime behavior of power-limited, heterogeneous processors. The evaluation problem is specifically concerned with evaluating the collective attributes of selections of cores rather than evaluating the features of individual cores. A suite of metrics is defined to address the evaluation problem. The metrics quantify considerations that could otherwise only be evaluated subjectively. The selection problem is addressed with an iterative, diversity-preserving algorithm that emphasizes the flexibility available to programs at runtime. The algorithm includes facilities for guiding the selection process with information from an expert, when available. Three variations on the selection algorithm are defined. A thorough analysis of the proposed selection algorithm is presented using data from a large-scale simulation involving 33 benchmarks and 3000 core types. The three variations of the algorithm are compared to each other and to current, state-of-the-art selection techniques. The analysis serves as both an evaluation of the proposed algorithm as well as a case study of the metrics.en
dc.contributor.sponsorEngineering and Physical Sciences Research Council (EPSRC)en
dc.language.isoenen
dc.publisherThe University of Edinburghen
dc.relation.hasversionErik Tomusk, Christophe Dubach, and Michael O’Boyle. Diversity: A design goal for heterogeneous processors. Computer Architecture Letters, 2015. DOI: 10.1109/LCA.2015.2499739.en
dc.relation.hasversionErik Tomusk, Christophe Dubach, and Michael O’Boyle. Four metrics to evaluate heterogeneous multicores. ACM Transactions on Architecture and Code Optimization (TACO), 12(4), Nov. 2015. DOI: 10.1145/2829950.en
dc.relation.hasversionErik Tomusk, Christophe Dubach, and Michael O’Boyle. Measuring flexibility in single-ISA heterogeneous processors. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT). ACM, 2014. DOI: 10.1145/2628071.2628125.en
dc.relation.hasversionErik Tomusk and Michael O’Boyle. Weak heterogeneity as a way of adapting multicores to real workloads. In Proceedings of the 3rd International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT). ACM, 2013. DOI: 10.1145/2484904.2484909.en
dc.subjectprocessor architectureen
dc.subjectheterogeneityen
dc.subjectsingle-ISAen
dc.subjectcore selectionen
dc.subjectdiversityen
dc.subjectflexibilityen
dc.subjectmetricsen
dc.subjectpower-awareen
dc.titleHeterogeneous processor composition: metrics and methodsen
dc.typeThesis or Dissertationen
dc.type.qualificationlevelDoctoralen
dc.type.qualificationnamePhD Doctor of Philosophyen


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