Signal processing for airborne bistatic radar
The major problem encountered by an airborne bistatic radar is the suppression of bistatic clutter. Unlike clutter echoes for a sidelooking airborne monostatic radar, bistatic clutter echoes are range dependent. Using training data from nearby range gates will result in widening of the clutter notch of STAP (space-time adaptive processing) processor. This will cause target returns from slow relative velocity aircraft to be suppressed or even go undetected. Some means of Doppler compensation for mitigating the clutter range dependency must be carried out. This thesis investigates the nature of the clutter echoes with different radar configurations. A novel Doppler compensation method using Doppler interpolation in the angle-Doppler domain and power correction for a JDL (joint domain localized) processor is proposed. Performing Doppler compensation in the Doppler domain, allows several different Doppler compensations to be carried out at the same time, using separate Doppler bins compensation. When using a JDL processor, a 2-D Fourier transformation is required to transform space-time domain training data into angular-Doppler domain. Performing Doppler compensation in the spacetime domain requires Fourier transformations of the Doppler compensated training data to be carried out for every training range gate. The whole process is then repeated for every range gate under test. On the other hand, Fourier transformations of the training data are required only once for all range gates under test, when using Doppler interpolation. Before carrying out any Doppler compensation, the peak clutter Doppler frequency difference between the training range gate and the range gate under test, needs to be determined. A novel way of calculating the Doppler frequency difference that is robust to error in pre-known parameters is also proposed. Reducing the computational cost of the STAP processor has always been the desire of any reduced dimension processors such as the JDL processor. Two methods of further reducing the computational cost of the JDL processor are proposed. A tuned DFT algorithm allow the size of the clutter sample covariance matrix of the JDL processor to be reduced by a factor proportional to the number of array elements, without losses in processor performance. Using alternate Doppler bins selection allows computational cost reduction, but with performance loss outside the clutter notch region. Different systems parameters are also used to evaluate the performance of the Doppler interpolation process and the JDL processor. Both clutter range and Doppler ambiguity exist in radar systems operating in medium pulse repetitive frequency mode. When suppressing range ambiguous clutter echoes, performing Doppler compensation for the clutter echoes arriving from the nearest ambiguous range alone, appear to be sufficient. Clutter sample covariance matrix is estimated using training data from the range or time or both dimension. Investigations on the number of range and time training data required for the estimation process in both space-time and angular-Doppler domain are carried out. Due to error in the Doppler compensation process, a method of using the minimum amount of range training data is proposed. The number of training data required for different clutter sample covariance matrix sizes is also evaluated. For Doppler interpolation and power correction JDL processor, the number of Doppler bins used can be increased, to reduce the amount of training data required, while maintaining certain desirable processor performance characteristics.